FIG. 1 is a schematic structural diagram of a display panel 1 in an existing technology. As shown in FIG. 1, the display panel 1 includes a display area 10, a gate driving circuit 20 arranged around the display area 10, an integrated circuit (IC) 30 disposed below the display area 10 and arranged at an adhesive frame region (not shown for clarity) on the gate driving circuit. The display area 10 includes pixel units, and multiple gate lines and multiple data lines are disposed around the pixel units. Each of the pixel units includes a pixel electrode. The pixel units display an image under an on-off control of thin film transistors (TFTs). The driving circuit 20 also includes multiple TFTs. Each of the TFTs is connected to one gate line or one data line. A driving voltage is applied to a corresponding gate line or a corresponding data line under the control of the TFT to drive the gate line or the data line.
In the TFT structure of the conventional driving circuit, the adhesive frame around the display area cannot be cured effectively because the gate shields the light.